Full Report
AMD has released mitigation and firmware updates to address a high-severity vulnerability that can be exploited to load malicious CPU microcode on unpatched devices. [...]
Analysis Summary
# Vulnerability: Improper Signature Verification in AMD CPU Microcode Patch Loader
## CVE Details
- CVE ID: CVE-2024-56161
- CVSS Score: Not explicitly stated in the text, but described as **high-severity**.
- CWE: Improper Signature Verification (Inferred)
## Affected Systems
- Products: AMD EPYC (Zen 1 through Zen 4 series), AMD Ryzen 9 CPUs.
- Versions: Zen 1, Zen 2, Zen 3, and Zen 4 architectures. Specific CPUID versions are listed in the source document (e.g., Naples, Rome, Milan, Genoa families).
- Configurations: Systems utilizing AMD Secure Encrypted Virtualization-Secure Nested Paging (SEV-SNP).
## Vulnerability Description
The vulnerability resides in the improper signature verification logic used by AMD's CPU ROM microcode patch loader, which employs an insecure hash function. This flaw allows an attacker with local administrator privileges to craft and load arbitrary malicious microcode patches onto vulnerable Zen processors. This can compromise the confidentiality and integrity of confidential guest environments protected by SEV-SNP or compromise the Dynamic Root of Trust Measurement (DRTM).
## Exploitation
- Status: **PoC available** (Demonstrated by Google researchers on AMD EPYC and Ryzen 9 CPUs).
- Complexity: **Low** (Requires local administrator privileges).
- Attack Vector: **Local**
## Impact
- Confidentiality: **High** (Potential compromise of SEV-SNP isolated guest data)
- Integrity: **High** (Potential modification of CPU behavior via malicious microcode)
- Availability: **Unknown/Implied Low** (Focus is on data integrity and confidentiality)
## Remediation
### Patches
- Mitigation requires a **microcode update** on all affected platforms.
- Some platforms also require a **SEV firmware update** for SEV-SNP attestation.
- Users must update the **system BIOS** and reboot to enable the mitigation's attestation.
- Users should confirm mitigation by checking if the installed microcode version matches the patched versions listed in the vendor advisory (CPUIDs noted in the context).
### Workarounds
- The text implies that the mitigation is tied directly to firmware/microcode updates. No explicit temporary workarounds were detailed aside from applying the required updates.
## Detection
- Detection relies on verifying the installed microcode versions against the fixed versions provided by AMD to confirm the mitigation is in place.
- Indicators of compromise (IoCs) would be the presence of unauthorized microcode patches or unexpected behavior from CPU instructions like RDRAND post-attack, though the PoC specifically forces RDRAND to return a known invalid state (4 with CF=0).
## References
- Vendor advisories detailing necessary microcode upgrades for specific CPU families.
- Google Security Team advisories regarding the flaw.
- NTU advisory regarding related SEV side-channel attacks (Li-Chung Chiang).